1. Field of the Invention
The present invention relates to the field of microprocessors and, more particularly, to multiple processor cluster systems.
2. Prior Art
The use of a microprocessor in a computer system is well known. Generally, a processor is coupled to a bus for transfer of information to and from memory. A memory controller is employed in controlling the access to memory. In most systems, a data cache is used to hold data currently being used in order to speed the access of this data. Input/Output devices are usually coupled to the bus, often times by the use of "slots" on the bus. In more sophisticated systems, more complex memory management schemes are utilized as well as a hierarchical bus structure with more than one bus.
As technology evolves, there is higher demand for multiple-processor systems to increase the processing power. Hence, computer systems employing multiple processors are more prevalent today. Parallel computing is becoming a common place technology. One way to utilize parallel computing is to place a plurality of processors on a bus and share resources allocated on a bus. Arbitration of access to common resources now require additional constraints.
However, as technology progresses further, an enhanced application is to implement a system having a plurality of these multiple processor system. That is, the multiple processor configuration of above is each configured as an independent processor cluster and a number of these clusters are combined into an integrated computer system. As long as each cluster confines its operations to within its own cluster, the complexities are not significantly advanced. However, if each cluster is provided the capability to access resources in other clusters, data arbitration and management are complicated significantly.
The present invention provides for one scheme to control local cluster memory access when such memory is accessible to resources from other clusters. Additionally, data from remote memory are stored in a remote data cache and controlled by the scheme of the present invention.